Commit b1676c1 1 parent dd1f483 commit b1676c1 Copy full SHA for b1676c1
File tree 3 files changed +15
-2
lines changed
rp2_common/hardware_sync/include/hardware
3 files changed +15
-2
lines changed Original file line number Diff line number Diff line change @@ -121,6 +121,10 @@ void restore_interrupts(uint32_t status);
121
121
122
122
void restore_interrupts_from_disabled (uint32_t status);
123
123
124
+ void disable_interrupts (void );
125
+
126
+ void enable_interrupts (void );
127
+
124
128
uint spin_lock_get_num (spin_lock_t *lock);
125
129
126
130
spin_lock_t *spin_lock_instance (uint lock_num);
Original file line number Diff line number Diff line change @@ -31,6 +31,15 @@ PICO_WEAK_FUNCTION_DEF(restore_interrupts_from_disabled)
31
31
void PICO_WEAK_FUNCTION_IMPL_NAME (restore_interrupts_from_disabled )(uint32_t status ) {
32
32
}
33
33
34
+ PICO_WEAK_FUNCTION_DEF (disable_interrupts )
35
+
36
+ void PICO_WEAK_FUNCTION_IMPL_NAME (disable_interrupts )(void ) {
37
+ }
38
+
39
+ PICO_WEAK_FUNCTION_DEF (enable_interrupts )
40
+
41
+ void PICO_WEAK_FUNCTION_IMPL_NAME (enable_interrupts )(void ) {
42
+ }
34
43
35
44
PICO_WEAK_FUNCTION_DEF (spin_lock_instance )
36
45
Original file line number Diff line number Diff line change @@ -201,7 +201,7 @@ __force_inline static void __mem_fence_release(void) {
201
201
/* ! \brief Explicitly disable interrupts on the calling core
202
202
* \ingroup hardware_sync
203
203
*/
204
- __force_inline static uint32_t disable_interrupts (void ) {
204
+ __force_inline static void disable_interrupts (void ) {
205
205
#ifdef __riscv
206
206
__compiler_memory_barrier ();
207
207
riscv_clear_csr (mstatus, 8 );
@@ -214,7 +214,7 @@ __force_inline static uint32_t disable_interrupts(void) {
214
214
/* ! \brief Explicitly enable interrupts on the calling core
215
215
* \ingroup hardware_sync
216
216
*/
217
- __force_inline static uint32_t enable_interrupts (void ) {
217
+ __force_inline static void enable_interrupts (void ) {
218
218
#ifdef __riscv
219
219
__compiler_memory_barrier ();
220
220
riscv_set_csr (mstatus, 8 );
You can’t perform that action at this time.
0 commit comments