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This is a high-level design document describing the way to apply custom SI settings for CMIS supported modules.
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## 1 Introduction and Scope
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Certain high-speed QSFP_DD, OSFP and QSFP modules require Signal Integrity (SI) settings to match platform media settings in order to achieve link stability, right tunning and optimal performance.
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##Clause from CMIS5.0 spec for Signal Integrity
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### 1.1 Clause from CMIS5p0 spec for Signal Integrity
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Excerpt from CMIS5.0 spec providing definition of Signal Integrity:
These SI settings can vary based on combination of the module vendor plus platform vendor. The module will have default TX/RX SI settings programmed in its EEPROM by module vendor, but platform vendor has provision to overwrite these settings to match their platform requirements.
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The host can apply new TX SI settings when TX Input Adaptive EQ is disabled for all TX Data Path lanes but RX SI settings can be applied directly. These TX/RX setting should be applied with Explicit Control bit is set to 1.
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##Clause from CMIS5.0 spec for Explicit Control
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### 1.2 Clause from CMIS5p0 spec for Explicit Control
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Excerpt from CMIS5.0 spec providing definition of Explicit Control:
SI parameters can be vendor and module specific. The vendor can populate desired SI param values in a JSON file. Provide an approach in the CMIS state machine to generate and apply host defined SI parameters to module eeprom.
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## 2 Requirements
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This feature would be enabled per platform basis. If platform wants to use this feature, they would need to provide optics_si_setting.json file during init for XCVRD to parse it. The SI parameters can be vendor and module specific. The vendor can populate desired SI param values in a JSON file. Provide an approach in the CMIS state machine to generate and apply host defined SI parameters to module eeprom. The Modules that do not support CMIS and not part of CMIS state machine are not in the scope of this document.
The SI media setting file optics_si_setting.json needs to be defined by each platform_vendor that will need SI settings. All SKUs of the platform will share the same optics_si_setting.json file. If no file is found, then this mechanism will be ignored.
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This file will have TX, RX setting blocks, and each block will have two subblocks: the first is global level setting and the next is port level setting. These subblocks will eventually contain per-lane SI parameter setting values based on the type of vendor and speed that are expected to be programmed.
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This file will have TX, RX setting blocks, and each block will have two subblocks: the first is global level setting and the next is port level setting. These subblocks will eventually contain per-lane SI parameter setting values based on the type of vendor and speed that are expected to be programmed. The SI settings will not depend on cable length.
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## TX_SETTING:
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### 3.1 TX_SETTING:
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This section will provide details on whether the TX EQ (TX input equalizer control) setting is FIXED or ADAPTIVE. Only adaptive EQ should be used for TX input, and it's enabled as the default setting in module. Fixed EQ is not recommended for TX direction and will not work until the SI/Hardware team explicitly recommends it.
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If the EQ_FIXED flag is false or not present, then the SI param generation flow will come out of TX_SETTING and continue with the RX_SETTING block. But if the EQ_FIXED flag is true for TX_SETTING, then we need to disable AdaptiveInputEqEnableTx.
The RX_SETTING block contains the same sections as TX_SETTING, but the EQ_FIXED flag should always be true. The SI settings can be directly written and applied for RX output equalization.
This block's first level of identification will be the range of port numbers. The ports can be defined as a range of 0-31 or a list of multiple ports: 1, 2, 3, or a list of ports in the range of 5–10, 25–31, matching the index number in the port_config.ini file. This port range will have a unique defined lane speed, which will have unique vendor and vendor part number entries supporting this speed. Module key will be created based on speed and vendor details.
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Each vendor will have per-lane SI param attribute entries applicable for the identified port + speed for the platform vendor. This value will be searched through the module key.
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## PORT_MEDIA_SETTINGS:
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### 3.4 PORT_MEDIA_SETTINGS:
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The entries in this block will be unique single port numbers. The control of SI attribute list generation search will reach the PORT_MEDIA_SETTINGS block only when no attribute list is generated in the GLOBAL_MEDIA_SETTINGS block.
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There will be unique speed and vendor/vendor_PN entries in each identified port block.
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Default values can be platform defaults for multiple vendors in each section.
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##List of standard TX/RX SI parameters
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### 3.5 List of standard TXRX SI parameters
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- SI_PARAM_TX_INPUT_EQ
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- SI_PARAM_RX_OUTPUT_PRE
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- SI_PARAM_RX_OUTPUT_POST
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- SI_PARAM_RX_OUTPUT_AMP
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## Sample Optics SI setting file:
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### 3.6 Sample Optics SI setting file:
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```
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{
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“TX_SETTING”: {
@@ -137,32 +144,28 @@ Default values can be platform defaults for multiple vendors in each section.
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“GLOBAL_MEDIA_SETTINGS” : {
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“1-20”: {
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“100G_SPEED”: {
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“CREDO”: {
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“CREDO_PN”: {
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“SI_PARAM_RX_OUTPUT_PRE” : {
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“lane0” : “5”,
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“lane1” : “5”,
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“lane2” : “5”,
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“lane3” : “5”,
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“lane4” : “5”,
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“lane5” : “5”,
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“lane6” : “5”,
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“lane7” : “5”,
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}
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“CREDO -CAC82X321M2MC0HW”: {
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“SI_PARAM_RX_OUTPUT_PRE” : {
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“lane0” : “5”,
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“lane1” : “5”,
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“lane2” : “5”,
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“lane3” : “5”,
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“lane4” : “5”,
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“lane5” : “5”,
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“lane6” : “5”,
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“lane7” : “5”,
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}
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},
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“INNOLIGHT”: {
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“INNOLIGHT_PN”: {
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“SI_PARAM_RX_OUTPUT_POST” : {
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“lane0” : “8”,
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“lane1” : “8”,
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“lane2” : “8”,
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“lane3” : “8”,
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“lane4” : “8”,
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“lane5” : “8”,
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“lane6” : “8”,
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“lane7” : “8”,
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}
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“INNOLIGHT -T-DP8CNT-NCI”: {
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“SI_PARAM_RX_OUTPUT_POST” : {
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“lane0” : “8”,
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“lane1” : “8”,
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“lane2” : “8”,
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“lane3” : “8”,
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“lane4” : “8”,
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“lane5” : “8”,
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“lane6” : “8”,
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“lane7” : “8”,
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}
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}
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}
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}
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},
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“PORT_MEDIA_SETTINGS” : {
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“32”: {
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“EOPTOLINK”: {
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“32”: {
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"100G_SPEED": {
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"Default": {
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“SI_PARAM_RX_OUTPUT_PRE” : {
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“lane0” : “9”,
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}
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```
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#Proposed Work-Flow
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## 4 High-Level Design
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Please refer below points in line with flow diagram.
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1. When CMIS-supported module insertion happens in XCVRD, the module will progress to the AP_CONFIG state (after DP_DEINIT state) in the CMIS state machine. During which, when the module is in DataPathDeactivated or Disabled state, check if the optics_si_setting.json file is parsed successfully and if lane speed needs special Signal Integrity (SI) settings.
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This feature would be enabled per platform basis. If platform wants to use this feature, they would need to provide optics_si_setting.json file during init for XCVRD to parse it.
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## 5 SAI API
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There are no changes to SAI API
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## 6 Configuration and management
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There are no changes to any CLI/YANG model or Config DB enhancements.
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## 7 Warmboot and Fastboot Design Impact
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There is no impact to Warmboot and Fastboot design. This feature is invoked as part of exisiting CMIS manager flow only
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#No Transceiver Present
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## 8 Restrictions or Limitations
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If transceiver is not present:
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- All the workflows mentioned above will not invoke
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Modules that do not support CMIS and not part of CMIS state machine are not in the scope of this document.
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# Out Of Scope
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Modules that do not support CMIS and not part of CMIS state machine are not int he scope of this document.
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## 9 Unit Test cases
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1. Check XCVRD/CMIS log if optics SI settings are succesfully applied for module which expect the SI settings.
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2. Check XCVRD/CMIS log if optics SI settings are ignored for modules that dont expect the SI settings.
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3. Validate no link flaps or link down once SI settings are applied
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